Posts Tagged ‘tand’

Ternary Coded Decimal and 7 Segment Control.

March 23, 2024

When you are designing binary circuits you will need to display your results in Decimal so it readable by the user, such as Temperature, Distance and Arithmetic calculation results. There are 74LS chips that will make the conversion for you, such as the 74LS148. It seems like we need to investigate the Ternary version and see if reveals some interesting results.

1A

The first design (1A) utilises the well known Ternary TAND Gate, where the assertions are the positive voltage only.

1B

The second design (1B) replaces the TAND with a TONLY Gate as we have no need of the negative values if we are interfacing a binary circuit. Looking at the TONLY Gate it seems that we do not need such a complex gate as the ones used, maybe we could just use some Unary Gates to do the same job.

1C

Design (1C) fulfils this completely using only 3 Unary gates, by creating a USR Gate that can be modified by another input, in this case it is the positive that gets asserted from the result of the first input, the final Gate is just another cascade from the second Gate. The output is either positive or zero so it can be linked to a Binary circuit.

1D

The last design (1D) in this set reduces the Unary Gates to 2, thus allowing a negative as an output, this is mainly for use in other Ternary circuits, like the one I will show in another design (2B).

My basic approach to using Ternary, is to make it more useful than binary which has many short falls that nobody can see unless you have been involved in designing these circuits from scratch, the current pardigm requires a complex binary arch to acomplish results and requiring multiple iterations to arrive at a result. Where Ternary can accomplish more in less gate interations than binary. Each Ternary Gate is only slightly more complex than its Binary counterpart, such as the inverter.

These circuits show how much can be achieved with less resources while being less complex connections than the binary version.

7 Segment Circuit

The final section is the Ternary to 7 Segment circuit. The first circuit (2A) is a basic 0 to 9 Led from a 3 Trit input, using the 3 Unary Gate logic from my earlier design (1C), the second circuit (2B) gives you another 9 more selections. Ternary easily uses negative numbers to increase data width selection, more elaborate schemes could be accomplished, like a complete 27 symbol choice, if I used all 13 positive numbers and all 13 negative numbers and zero.

2A

2B

Both of these designs use Diodes to accomplish the 7 Segment interface, making it suitable for a LED chip such as a Common Cathode TOS5121AR (Titan), LSD505400 (PlusOPTO), LTS-5003AWC (LITEON). You could even make your own with Leds or use a Large display.

I hope to finish my Division section of my Ternary ALU very soon, so far I have Addition, Subtraction, Multiply and a few Logic gates. I am still designing the shift registers and memory, while the ROM will be programmable with switches, I am basing it on 81 Trits at present.

Regards Arto

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Ternary Test Circuits 2

January 28, 2024

Ternary Test Board v2

This board design concentrates on the 2 input Ternary Combinations.

I had made many Ternary Gates, here are 2 preferred designs using optical relays, using a 28 pin form.

The display units are less demanding and can be designed in many ways, here are 3 designs, using 24 pins.

The V9 Ternary display unit requires 100 ohm resistors before grounding, if you use V7 or V8 you can just use shorting wires if you requires them, or just leave in the 100 ohm resistors. ( untested)

First of all the 6 switched inputs relates to three 2 input gates which are arranged to give you a maximum of choice.

The first 2 inputs A1 + B1 are directly combined in C1 to create the 2 output gate, designed by the links you combine in 12 pin matrix on the right side of each TNG2-1 chip.

To make your life easier I have put a number of gates that you can use on the bottom of the main board.

The LED outputs are in three groups:

1] switched inputs (6) A1 B1 A2 B2 A3 B3
2] output from each ternary gate (3) C1 C2 C3
3] output from combinations of 3 ternary gates D1 D2
4] output from the last 2 gates E1

To understand the Ternary Gate link matrix, here is a legend:

 _________________          _________________
 |    |     |    |  _____  |     |     |     |
 |  + |  X  |  - | |     | |  +  |  X  |  -  |
 |____|_____|____| |  0  | |_____|_____|_____|
      |     |  ____|_____|_____  |     |
      |  0  | |    |     |     | |  0  |
      |_____| |  + |  X  |  -  | |_____|
              |____|_____|_____|

Where X is the input link to the TNG2-1 chip.

Here is a simple schematic of the test board, set up with various gates and a set of links. I have indicated the outputs from each stage.

Here are the outputs from different input combinations, The first is the same as the diagram:

SW	C	D	E      

TAND	TNAND	TXNOR
1	0	0	0
0
TOR	TNOR
-1	1	-1
1
TXOR
1	-1
1

SW	C	D	E
1	1	-1	1
1
-1	1	-1
1
0	0
1

SW	C	D	E
1	1	-1	1
1
1	1	-1			
1
1	-1
1

SW	C	D	E
0	0	0	0
0
0	0	0			
0
0	0
0

SW	C	D	E
-1	-1	1	1
-1
-1	-1	1
-1
-1	-1
-1

SW	C	D	E
1	0	-1	1
0
-1	1	-1
1
0	0
-1

The jumper settings allows 81 variations, in 3 blocks -1 to 27, 28 to 54, 55 to 81;

I set the basic set up as number 67 from the list above. There are only 36 link combinations that include all three outputs from gates C (they form a top/bottom symmetrical list). Here are the sets:

6 8
12 15 16 17 18
20 22 23 24 26
30 33 34 35 36
39 43
46 47 48 49 52
56 58 59 60 62
64 65 66 67 70
74 76

I hope you can find the many great discoveries of computation inside the Ternary domain, regards Arto.

Ternary Test Boards PCB1E Zipfile

All the PCB and Schematics for this project. EasyEDA files only.

$15.00

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TAND Gate

May 9, 2021

The last two post were my personal dialog with Trinary procedures so I can start to create complex decision trees that can act in a intelligent and logical way. These are the beginnings into a natural engineered form of intelligence, I dare not say AI as these ideas are not artificial, they are natural only non living.

I went back to some of my work with the DG series of chips so I could make an interface board for the Led Matrix. I could design it with relays but decided that it would be great to see other options for Trinary design. Once mastered, an ALU would be the first step, maybe with many extra functions that binary ALU’s struggle to implement. I hope to add a Trinary version of Quantum Arithmetic built from these gates. (Not Quantum Mechanics)

The first hurdle to climb is to test the DG403.

The next is to define the Trinary gates required.

Then create a schematic and a PCB board

Here is the DG403 version of an TAND gate

****Warning**** everything here has not been tested, so I apologise for any errors.

I hope you enjoy my adventure, it has been a long, quite, happy and while being a lonely journey, it is never boring, excitement for the future is beyond any reward, regards Arto.

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The 2 to 9 Decoder

May 4, 2021

The 2 to 9 Decoder

by Arto Juhani Heino (c) 2021

The completion of the trinary understanding in relays has been very rewarding, this is my first attempt at a trinary decoder chip version of the 3-8 decider 74138, where a 2-9 decoder TD2-9 is a trinary designed device that would also do the job. It could be fabricated with FETs and miniaturised so it fits onto existing chip boards.

As I see this as my first step into making useful and efficient circuitry based on trinary inputs and easily adapted to the standards in current use. I see great promise in adapting trinary systems to current binary as a step into integration. These ideas are adaptable and flexible to be used in some AI systems. even now.

The long dreamed idea of a trinary system was to advance understanding of natures logic and repair the mistakes made in the service of short gain which is full of hubris and greed. Current digital systems can be 256 wide, but not in most cases they run 64bit and 32bit subsystems even some 16 and 8 bit are in the mix, is all due to the through put required by graphic chips to reduce time lags and memory bottle necks with all that constraint issues.

These behemoth super computer systems are complex to design and control. let us look some maths.

Binary Trinary

0………+ 0 –
2 bit…….3 trit
4 bit…….9 trit
8 bit…….27 trit
16 bit…..81 trit
32 bit…..243 trit at this point we have reached beyond our current systems
64 bit…..729 trit
128 bit…2187 trit
256 bit…6561 trit
512 bit…19683 trit As you can see that 64bit computing is the norm at present and moving into 128bit at lighting pace. Where we could have reached 729 trit in the same time frame. imagine the 64bit super cellphone you hold in your hand would have been the norm in 1980’s. This is the amount of development retardation we were forced to endure due to short sightedness and unripe understanding of all the future issues at hand. This simple list shows one aspect, here the binary decoder version

Binary inputs and Binary outputs
1_______________2
2_______________4……74139
3_______________8……74138……4028
4_______________16….74154
5_______________32
6_______________64

So a 3 to 8 decoder has the trinary equivent of the 2 to 9 decoder, if we ueed 3 inputs we would arrive at 27 outputs, the advantages are simple.

Trinary Inputs and Trinary outputs
Trinary Inputs and Binary outputs
Binary Inputs and Binary outputs
Binary Inputs and Trinary outputs
1___3……..TD1-3
2___9……..TD2-9 can also act like two of 4 bit dual level logic (2 Only gates make a Sure gate)
3___27……TD3-27
4___81……TD4-81
5___243….TD5-243
6___729….TD6-729

There are no off the shelf trinary chips to build useful devices from these decoders as yet.At this present form(very large relays) you could apply these trinary systems to AI of the grid system, where self regulation with the enviroment is required and not optional. As you are dealing with an Earth that has all three parts of the trinary logic, the Sky, the surface and Inner Earth, as ” + 0 – “. I have extended the understanding here to illustrate our well of energy we walk upon.

This diagram illustrates the relay design of the three different trinary gates you need here. You can make the relays a small or big as you need . Everything here is simple and easily built on you electronic bench, please feel free to use these gates in a project.

INC and DEC gates and a TAND gate

As now I have decided upon my choice of trinary AND gates, which there are a few, the TAND gates now lives amongst my circuit ideas. More decoders and encoder to be illustrated very soon.

TD2-9 Trinary Decoder

Here is the place this circuit will live, 2 of these to drive the 16 pin 8 x 8 led matrix (ADM-388C0). How simple is that, 4 trinary trits control 81 LED locations, 64 for the Matrix and 17 for other things.Regards Arto.

The Trinary Explorer Board

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