Posts Tagged ‘rgb led’

Ternary Test Circuits 2

January 28, 2024

Ternary Test Board v2

This board design concentrates on the 2 input Ternary Combinations.

I had made many Ternary Gates, here are 2 preferred designs using optical relays, using a 28 pin form.

The display units are less demanding and can be designed in many ways, here are 3 designs, using 24 pins.

The V9 Ternary display unit requires 100 ohm resistors before grounding, if you use V7 or V8 you can just use shorting wires if you requires them, or just leave in the 100 ohm resistors. ( untested)

First of all the 6 switched inputs relates to three 2 input gates which are arranged to give you a maximum of choice.

The first 2 inputs A1 + B1 are directly combined in C1 to create the 2 output gate, designed by the links you combine in 12 pin matrix on the right side of each TNG2-1 chip.

To make your life easier I have put a number of gates that you can use on the bottom of the main board.

The LED outputs are in three groups:

1] switched inputs (6) A1 B1 A2 B2 A3 B3
2] output from each ternary gate (3) C1 C2 C3
3] output from combinations of 3 ternary gates D1 D2
4] output from the last 2 gates E1

To understand the Ternary Gate link matrix, here is a legend:

 _________________          _________________
 |    |     |    |  _____  |     |     |     |
 |  + |  X  |  - | |     | |  +  |  X  |  -  |
 |____|_____|____| |  0  | |_____|_____|_____|
      |     |  ____|_____|_____  |     |
      |  0  | |    |     |     | |  0  |
      |_____| |  + |  X  |  -  | |_____|
              |____|_____|_____|

Where X is the input link to the TNG2-1 chip.

Here is a simple schematic of the test board, set up with various gates and a set of links. I have indicated the outputs from each stage.

Here are the outputs from different input combinations, The first is the same as the diagram:

SW	C	D	E      

TAND	TNAND	TXNOR
1	0	0	0
0
TOR	TNOR
-1	1	-1
1
TXOR
1	-1
1

SW	C	D	E
1	1	-1	1
1
-1	1	-1
1
0	0
1

SW	C	D	E
1	1	-1	1
1
1	1	-1			
1
1	-1
1

SW	C	D	E
0	0	0	0
0
0	0	0			
0
0	0
0

SW	C	D	E
-1	-1	1	1
-1
-1	-1	1
-1
-1	-1
-1

SW	C	D	E
1	0	-1	1
0
-1	1	-1
1
0	0
-1

The jumper settings allows 81 variations, in 3 blocks -1 to 27, 28 to 54, 55 to 81;

I set the basic set up as number 67 from the list above. There are only 36 link combinations that include all three outputs from gates C (they form a top/bottom symmetrical list). Here are the sets:

6 8
12 15 16 17 18
20 22 23 24 26
30 33 34 35 36
39 43
46 47 48 49 52
56 58 59 60 62
64 65 66 67 70
74 76

I hope you can find the many great discoveries of computation inside the Ternary domain, regards Arto.

Ternary Test Boards PCB1E Zipfile

All the PCB and Schematics for this project. EasyEDA files only.

$15.00

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Ternary Test Circuits

January 18, 2024

Ternary Test Circuits

This board can accommodate 3 ternary chips the “BT18-9”, “UGC1” and “UDC1”, all of which are separate units, the BT18-9 needs either a set of ribbon cables with a socket or it can be directly connected with some HDR pins such as the connection diagram into the test board.

BT18-9

18 Binary paired Inputs (A1 B1) to (A9 B9)
9 Ternary outputs T0 to T8
OE# = output enable (you can set inputs then set to 0)
CE# = chip enable (you must enable to 0 to start chip)
+5V
GND
-5V

UGC1

1 Ternary input
1 Ternary output
1 led indictor of (-)
6 sets of programable inputs, in order

T1 T2 T3
T2 T3 T1
T3 T1 T2

T1 T3 T2
T2 T1 T3
T3 T3 T1

You can only connect 1 set at any one time, if you use a set of 3 jumper pins on all of the sets you could swap your combinations. These combinations will change your inputs into any one of six possibilities. This could also be done by using a analogue chip in a separate circuit.

UDC1

3 Ternary inputs
3 sets of 3 colour led outputs
3 sets of 3 colour led outputs (mirror of 1st set) So you could use these as Binary output switches or sensors as required.
GND
V1 = +5V
V2 = spare 1 (-5v)

There are 3 ternary input switches (A B C) for all three RGB outputs (ZA ZB ZC) to function, there are also 3 selectors that need to be programmed first. Two of these are programmable by a binary source, while the other is by the onboard switches (C1 C2 C3). The current footprint of the display chip is 24pin pdip, even though the board is longer. As this is still only version 7, more work to do yet and I will eventually make it fit inside the boundary similar to the UGC1 board, on version 8 or 9. I am using optical relays in this design, something that I found useful in my ternary work.

Starting from a Binary input where you have 2 bits to make a ternary trit:

00 = +
10 = 0
01 = –

The bit combination “11” is not valid and will not be used even though it is available as a binary output. The ternary converter ignores it.

Here are the 27 Unary gate combinations that are available and the binary combinations that will create them all. The UGI is the “Unary Gate Index”, numbering of all the gates in a system I have shown on my previous blogs.

Starting with the A1 and B1 as the first pair, then the A2,B2 then A3,B3, these three sets will give you a Unary set of 3 that will configure the basic Unary Chip “UGC1” to one of the 27 gates.

The second set A4,B4 + A5,B5 + A6,B6 will configure the next UGC1 gate. The third set are the switches C1,C2,C3 these will give you another UGC1 gate for you to use.

The outputs ZA,ZB,ZC correspond to the input data A,B,C, where your programmed UGC1 gate is being used to compute your result into the Z Led outputs. Where:

Red = +
Green = 0
Blue = –

The input switches A,B,C,C1,C2,C3 also have RGB LEDs.

I hope this might start your interest in Ternary Logic and Computation, regards Arto.

** I have added UDC1 V8 to the Zipfile **

Ternary Test Boards PCB1D Zipfile

Al the PCB and Schematics for this project. EasyEDA files only.

$15.00

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Posted in Computing, Electronics, Technology | Leave a Comment »